Tvs Diode Array Spa Diodes Page 12 TVS Diode Array SPA Diodes Catalog

2017 Littelfuse, Inc. Specifications are subject to change without notice. Revised: 02/23/17 TVS Diode Arrays (SPA Diodes) these circuits, Littelfuse TVS Diode Arrays (SPA Diodes) are ideal. They have extremely low peak and clamping voltages due to their low dynamic resistance to provide ultimate protection for the IC. Leakage Current is the amount of current passed through the suppressor as the circuit operates normally (i.e. at the rated voltage or V RWM ). It is an important consideration for applications where the main power supply is battery driven. In these cases, the suppressor should allow as little leakage as possible, to avoid draining the battery unnecessarily. Suppressors have varied Standoff Voltage or Reverse Working Maximum specifications determined by their construction. This is used to determine if the part is suitable for given circuit parameters. For example, a 5 VDC-rated part should not be used for ESD protection on a 9 VDC bus. The excess voltage may cause degradation of the part or even catastrophic failure due to excessive heating caused by DC current flow. Another consideration is the Number Of Lines To Be Protected. This is determined by the system's data protocol. For example, USB buses have two or six data lines, HDMI has 8 data lines, 10/100/1000 BaseT Ethernet uses four to eight lines, etc. In cases where multiple data lines will be protected, it may be desirable to use a Package that has multiple channels (i.e. an array) to save board space and installation costs. Littelfuse TVS Diode Arrays are available in discrete and multi-channel packages to offer a broad selection of high quality devices to the circuit and board designer. Suppressor Location Place the suppressor as near the line that it is protecting as possible, and as close as possible to the point of ESD entry. ESD transients should hit the suppressor first on entry to the board. Because ESD is such a fast rise-time event, any distance between the protected line and the ESD suppressor will mean more transient voltage to the IC. ESD Prevention During and After Manufacturing Manufacturers typically include structures stamped directly on the die to provide some ESD protection of the circuits through the manufacturing process. Production environments tightly control and take precautions to ensure that static electricity levels on personnel and equipment are minimized. For example, when handling parts or their containers, workers wear wrist straps, anti-static garments and work at grounded workstations. Various environmental controls (humidity/air ionization) are also implemented. Finally, by transporting products in special electrostatic shield packaging ensures safe arrival to the customer. More powerful transients await as the product moves outside the controlled factory environment. Often designers and/or engineers will need to provide additional off-chip, board-level solutions to fill in the gaps. Ultimately, hardware or board designers must add supplementary ESD devices to protect these sensitive chipsets from the high level ESD threats seen in the field. Supplemental ESD Protection When deciding on more ESD protection, the next step is to identify the appropriate suppressor. Consider the following specifications to make an appropriate selection: Capacitance Peak voltage and clamping level Dynamic Resistance Leakage current Standoff Voltage or Reverse Working Maximum Number of lines to be protected Package Capacitance is becoming an extremely important criterion since the data rates at which electronic products are communicating continue to increase. As previously mentioned, the Clamping Level of the suppressor determines how much of the ESD transient is eliminated. A related value is the Peak Voltage. As the suppressor transitions from high to low resistance, a portion of the ESD transient is transmitted before the clamping voltage is established. The Dynamic Resistance is a value calculated by taking the difference in clamping voltage at two different current levels and can be used to compare the effectiveness various ESD protection technologies. See our application note, "Selecting an Appropriate ESD Device" for more information. These are important factors for those IC's that do not have a substantial amount of on-chip ESD protection. In this case, it is important that as little ESD as possible is actually experienced by the IC. For ESD Suppression Strategies and Standards (continued)

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