Tvs Diode Array Spa Diodes Page 11 TVS Diode Array SPA Diodes Catalog

2017 Littelfuse, Inc. Specifications are subject to change without notice. Revised: 02/23/17 TVS Diode Arrays (SPA Diodes) ESD Suppression Strategies Chip Level ESD Protection In the heart of the device is the integrated circuitry (IC) responsible for its processing and communication function. Typically, trade-offs for the chip designer are ESD protection versus die space and the demand of smaller and faster chips-which require sub-micron processes and very fine line widths. As more ESD protection structures are incorporated into the chip, survivability increases. The choice is either less space available for functional circuitry or make the chip larger. In today's market, "smaller and faster"is the goal, and ESD protection is sacraficed for more on-chip space to boost functionality and speed. Consequently, circuits will become more sensitive to ESD and other transients. Input and output port connections allow the free flow of data - including transients. ESD can enter a port-or the disconnected end of the cable while connecting/ disconnecting cables. It will then travel through the connector to the PC board and propagate down the data lines toward the ICs. Littelfuse offers ultra-small packages to provide maximum protection with a minimum of space. The suppressor devices are installed between the data line and the chassis ground (parallel connection) and shunt the ESD transient from the data line to the ground. Optimally, diode array devices should be the first thing a transient should encounter on the board. NOTE: For high-speed signal pins, devices with extremely low capacitance levels should be used. Consult for more detailed information on which products offer best protection for high-speed connectors. Board Level ESD Protection Especially critical in portable systems is the board layout. Parasitic inductance in the protection path can result in significant voltage overshoot, easily getting past the insulation barriers and damaging the the circuit. This is especially critical in the case of fast rise-time transients such as ESD or EFT. However, the need for board-level protection will vary from system to system. Factors determining level of need: The board layout ESD capabilities of the IC Physical ability of ESD transients to get on the data lines Empirical testing can also be done to help determine the system's susceptibility. ESD Suppression and Circuit Design Considerations Proper use of circuit protection helps to reduce ESD risks. Littelfuse TVS Diode Arrays possess the speed, clamping voltage, and residual current levels that will protect today's sensitive semiconductors and electronic circuitry. Many devices present an extremely low parasitic capacitance to prevent signal degradation in high-speed/ high bandwidth communications. When selecting ESD suppressors, designers need to consider potential coupling paths that would allow ESD to enter the circuit. These weak points should be considered for diode array protection, selected with characteristics appropriate for the component sensitivity, and the equipment and environment where it will be used. Common ESD Entry Points ESD quickly finds weak spot(s) and will sneak into devices using a wide range of potential coupling paths. Careful consideratation about potential weak points, and taking steps to seal off those paths and fortify the most vulnerable electronic components is vital. Below are ways an ESD pulse can enter an electronic device: 1. An initial electric field from an arc can capacitively couple over a large surface area. It can appear like a signal to high- impedance analog circuits and measure up to 4000 V/m 2. Current or charge from the arc can be injected and: Smash through insulating layers in the component and damage the gates of MOSFETs and CMOS devices Trigger a latch-up in CMOS devices Short circuit reverse and forward-biased PN junctions Melt bonding wires 3. A voltage pulse on conductors caused by current (V = L * dl/dt) whether from ground, power or signal wiring, can spread into every device that is linked 4. An intense magnetic field emitted from an ESD arc can have a frequency range of 1 to 500Mhz, which can inductively couple into every nearby wiring loop and be as high as 15 A/m 5. An electro-magnetic field generated by the arc's magnetic field can radiate and couple into long wires that act like receiving antennas ESD Suppression Strategies and Standards (continued)

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