Sidactor Protection Thyristor Products Page 71 SIDACtor Protection Thyristor Products

SIDACtor Protection Thyristors 2017 Littelfuse, Inc. Specifications are subject to change without notice. Revised: 02/23/17 Broadband Optimized TM Protection Description Features & Benefits Compatible with VDSL2 (30MHz) and with (106MHz) Balanced overvoltage protection Low distortion Low insertion loss Low profile Response time under 500ns RoHS Compliant Pb-free E3 means 2nd level interconnect is Pb-free and the terminal finish material is tin(Sn) (IPC/JEDEC J-STD-609A.01) Applicable Global Standards Absolute Maximum Ratings between pin1 and pin 3, Ta= 25C (Unless otherwise noted) Notes: 1. The device must be in thermal equilibrium at 25 C ANSI C62.41 IEC 61000-4-12 IEC 61000-4-5, 30A (t P =8/20 s) 2nd edition IEC 61000-4-2 level 4 -- 15kV (air discharge) -- 8kV ( contact discharge) Pinout Designation & Schematic Symbol Agency Approvals Agency Agency File Number E133083 SDP Biased Series - SOT23-6 This new SDP Biased series provides overvoltage protection for applications such as VDSL2, ADSL2, and ADSL2+ with minimal effect on data signals. This silicon design innovation results in a capacitive loading characteristic that is compatible with these high bandwidth applications. This surface mount SOT23-6 package provides a surge capability that exceeds most worldwide standards and recommendations for lightning surge withstand capability of tertiary protectors. 4 5 6 1 2 3 Part Number Marking Maximum Junction Temperature Storage Temperature Range I pp 8/20s C C A Max SDP0240T023G6RP P24 150 -65 to 150 30 1 Electrical Characteristics between pin 1 and pin 3, Ta = 25C Part Number Marking V DRM @I DRM =100nA I DRM @V DRM =19V V S @1V/s I H I S Co@f=1MHz,2V Delta Co@ Line Bias = 1 V to 19 V V min pA typ V max mA typ mA min pF max SDP0240T023G6RP P24 19 300 29 40 10 3.0 0.5 RoHS e3 Pb Additional Information Datasheet Samples Resources

Previous Page
Next Page